// +FHDR------------------------------------------------------------
//                 Copyright (c) 2023 NOVAUTO.
//                       ALL RIGHTS RESERVED
// -----------------------------------------------------------------
// Filename      : async_fifo_g2b_unit.v
// Author        : ICer
// Created On    : 2023-12-28 17:43
// Last Modified : 2024-01-08 17:12 by ICer
// -----------------------------------------------------------------
// Description:
//
//
// -FHDR------------------------------------------------------------


module async_fifo_g2b_unit #(
    //parameter
    parameter WIDTH = 4
)( /*AUTOARG*/
   // Outputs
   binary,
   // Inputs
   gray
   );

// ----------------------------------------------------------------
// Interface declare
// ----------------------------------------------------------------
//output reg [WIDTH -1:0] binary;
output     [WIDTH -1:0] binary;
input      [WIDTH -1:0] gray;

// ----------------------------------------------------------------
// Wire declare
// ----------------------------------------------------------------

// ----------------------------------------------------------------
// AUTO declare
// ----------------------------------------------------------------
/*AUTOOUTPUT*/
/*AUTOINPUT*/
/*AUTOWIRE*/

//integer k;
//always @*begin
//    for(k = 0; k < WIDTH; k = k + 1)begin: BIN_LOOP
//        binary[k] = ^(gray >> k);
//    end
//end

assign binary = {gray[WIDTH-1], (binary[WIDTH-1:1] ^ gray[WIDTH-2:0])};

endmodule
// Local Variables:
// verilog-auto-inst-param-value:t
// verilog-library-directories:(".")
// verilog-library-extensions:(".v")
// End:

